1. Field of the Invention
The present invention generally relates to sigma-delta A/D converters, and particularly relates to a sigma-delta A/D converter that adaptively changes the amount of an analog signal feedback.
2. Description of the Related Art
Sigma-delta A/D converters obtain a differential between an analog input signal and a feedback signal fed back after the D/A conversion of the digital output, and performs an A/D conversion with respect to the differential signal after the integration thereof. The circuit portion that performs the A/D conversion of the differential signal after integration may be a low-precision A/D converter having a small number of output bits. For example, a comparator having one bit output may be used for this purpose. In this case, the one-bit digital output of the comparator is D/A-converted and fed back, and a differential between the feedback signal and the analog input signal is obtained and integrated. The integration accumulates differences between the input and the output over time. When the accumulated difference between the input and the output over time exceeds the threshold of the comparator at some point in time, the output of the comparator is inverted.
The feedback signal made by performing D/A conversion on the output “1” of the comparator is 1 V, and the input signal is 0.75 V, for example. The differential, which is equal to −0.25 V, is accumulated through integration. The output of the comparator that receives the integrated signal as its input then changes from “1” to “0” at some point in time. The feed-back signal made by performing D/A conversion on the output “0” of the comparator is 0 V, for example. Since the input signal is 0.75 V, the difference is +0.75 V. The differential (+0.75V) is accumulated by integration. The output of the comparator that receives the integrated signal as its input then changes from “0” to “1” at some point in time. In this manner, the digital output alternates between “0” and “1”.
A rate at which the integrated signal changes by integrating +0.75 V is three times greater than the rate at which the integrated signal changes by integrating −0.25V. As a result, the period during which +0.75 V is being accumulated, i.e., the period during which the digital output is “0”, is one third of the period during which −0.25 V is being accumulated, i.e., the period during which the digital output is “1”. The digital output that alternates between “0” and “1” thus has an average that is equal to 0.75, which precisely represents the input analog potential.
If the digital output is sampled, the sampled digital output in the above example becomes “111011101110 . . . ”, for example. With the over-sampling of the digital output and the averaging by use of a FIR low-pass filter, therefore, the A/D conversion output is obtained with the precision commensurate with the over-sampling rate.
In this manner, the sigma-delta A/D converter provides high precision by its nature, and has an advantage in that most of the processing is performed digitally, with few analog-based parts.
FIG. 1 is a drawing showing the dynamic range of a sigma-delta A/D converter. In general, a sigma-delta A/D converter has a dynamic range characteristic as shown in FIG. 1A. The horizontal axis represents an analog input signal level, and the vertical axis represents an S/N ratio of the digital output signal.
When the analog input signal becomes greater than the range of the DAC feedback (i.e., the amount of the feedback that is obtained through the D/A conversion of the digital output), the feedback control operation as described above cannot be achieved. Because of this, the S/N ratio drops abruptly when the analog input signal level exceeds a predetermined level as shown in FIG. 1A. Further, if the range of the analog input signal becomes small compared to the predetermined precision of the A/D conversion, quantization noise increases comparatively, resulting in the deterioration of the S/N ratio. As shown in FIG. 1A, therefore, the dynamic range in which the sigma-delta A/D converter is operable is limited to a predetermined range of the analog input signal.
Conventional means for providing a wider dynamic range for the sigma-delta A/D converter include increasing an order of the loop filter (i.e., the filter for integrating the differential signal), increasing the over-sampling rate, increasing the number of feedback loops, increasing the number of bits of the A/D converter and D/A converter (DAC: digital-to-analog converter) used in the feedback loop, etc. Such means, however, result an increase in circuit complexity, an increase in power consumption, etc.
Another method for achieving a wider dynamic range by taking a completely different approach than the above means is an adaptive-type sigma-delta A/D converter (Non-patent Documents 1 and 2). In general, a probable range of an input signal during a predetermined time period is narrower than the range of all the possible values of the input signal. In the adaptive-type sigma-delta A/D converter, the input/output characteristic of the sigma-delta A/D converter is adaptively changed according to the input signal level at each point in time, thereby achieving a wider dynamic range. Namely, when the analog input signal level is low, the amount of the DAC feedback is reduced to suppress quantization noise comparatively. When the analog input signal level is high, the amount of the DAC feedback is increased, thereby shifting the properly operable range toward a higher analog input signal level. With this provision, it is possible to achieve a wider dynamic range adaptively as shown in FIG. 1B.
[Non-patent Document 1]
N. C. Ramech and K. S. Chao, “Sigma Delta Analog to Digital Converters with Adaptive Quantization,” Proceedings of the 40 the Midwest Symposium on Circuits and Systems, Vol 1, p. 22–25, 1997
[Non-patent Document 2]
Zierhofer, C. M “Adaptive sigma-delta modulation with one-bit quantization,” IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 47, No. 5, p. 408–415, May 2000
The measures such as increasing the number of bits of the A/D converter and D/A converter have a problem in that the circuit construction becomes complex. In the adaptive-type sigma-delta A/D converter, also, it is not desirable to have a circuit construction becoming complex because of the control of the amount of the DAC feedback. Accordingly, it is desirable to achieve the control of the amount of the DAC feedback by a simple circuit construction that is made by adding only a slight modification to the existing circuit configuration of non-adaptive-type sigma-delta A/D converters.
Accordingly, there is a need for an adaptive-type sigma-delta A/D converter that can control the amount of the DAC feedback by use of a simple modification added to the circuit construction of a non-adaptive-type sigma-delta A/D converter.